a. The Field of the Invention
This invention relates to the field of integrated circuit manufacturing. In particular, the invention relates to a user interface in a system for inspection of defects on masks used in the manufacture of integrated circuits.
b. Description of Related Art
In designing an integrated circuit (IC), engineers typically rely upon computer simulation tools to help create a circuit schematic design consisting of individual devices coupled together to perform a certain function. To actually fabricate this circuit in a semiconductor substrate the circuit must be translated into a physical representation, or layout, which itself can then be transferred onto a template (i.e., mask), and then to the silicon surface. Again, computer aided design (CAD) tools assist layout designers in the task of translating the discrete circuit elements into shapes which will embody the devices themselves in the completed IC. These shapes make up the individual components of the circuit, such as gate electrodes, field oxidation regions, diffusion regions, metal interconnections, and so on.
Once the layout of the circuit has been created, the next step to manufacturing the integrated circuit (IQ is to transfer the layout onto a semiconductor substrate. One way to do this is to use the process of optical lithography in which the layout is first transferred onto a physical template which is in turn used to optically project the layout onto a silicon wafer.
In transferring the layout to a physical template, a mask (usually. a quartz plate coated with chrome) is generally created for each layer of the integrated circuit design. This is done by inputting the data representing the layout design for that layer into a device such, as an electron beam machine which writes the integrated circuit layout pattern into the mask material. In less complicated and dense integrated circuits, each mask comprises the geometric shapes which represent the desired circuit pattern for its corresponding layer. In more complicated and dense circuits in which the size of the circuit features approach the optical limits of the lithography process, the masks may also comprise optical proximity correction features such as serifs, hammerheads, bias and assist bars which are sublithographic, sized features designed to compensate for proximity effects. In other advanced circuit designs, phase shifting masks may be used to circumvent certain basic optical limitations of the process by enhancing the contrast of the optical lithography process.
These masks are then used to optically projected the layout onto a silicon wafer coated with photoresist material. For each layer of the design, a light is shone on the mask corresponding to that layer via a visible light source or an ultra-violet light source. This light passes through the clear regions of the mask, whose image exposes the underlying photoresist layer, and is blocked by the opaque regions of the mask, leaving that underlying portion of the photoresist layer unexposed. The exposed photoresist layer is then developed, typically, through chemical removal of the exposed/non-exposed regions of the photoresist layer. The end result is a semiconductor wafer coated with a photoresist layer exhibiting a desired pattern which defines the geometries, features, lines and shapes of that layer. This process is then repeated for each layer of the design.
As integrated circuit designs become more complicated, it becomes increasingly important that the masks used in photolithography are accurate representations of the original design layout. It is, unfortunately, unrealistic to assume that the electron beam and other machines used to manufacture these masks can do so without error. In the typical manufacturing process, some mask defects do occur outside the controlled process.
A defect on a mask is anything that is different from the design database and is deemed intolerable by an inspection tool or an inspection engineer. FIGS. 1(a)-(f), illustrate a mask 100 representing a simple integrated circuit design which contains some of the common mask defects that occur during the mask manufacturing process. The mask 100 comprises an opaque area 105, typically made of chrome, and clear areas 110 and 120 which represent the geometry primitives to be transferred onto the photoresist layer, and typically made of quartz. FIG. 1(a) illustrates an isolated pinhole defect 125 in the opaque area 105 of the mask 100. FIG. 1(b) illustrates an isolated opaque spot defect 130 in the clear area 110 of the mask 100. FIG. 1(c) illustrates edge intrusion defects 140 in the clear areas 110 and 120 of the mask 100. FIG. 1(d) illustrates edge protrusion defects 145 in the opaque area 105 of the mask 100. FIG. 1(e) illustrates a geometry break defect 150 in the clear area 110 of the mask 100. Finally, FIG. 1(f) illustrates a geometry bridge defect 155 in the opaque area 105 of the mask 100.
FIGS. 2(a)-(b) illustrate possible defects which may occur on a mask which utilizes optical proximity correction features. FIG. 2(a) illustrates a simple desired mask design 200 consisting of an opaque area 205, a clear area 210 which represents the shape desired to be transferred to the photoresist, and design serifs 215 which are added to the design to correct for optical proximity effects. FIG. 2(b) illustrates the mask 220 which could be produced by a typical electron bearn machine given the mask design 200 as an input. The mask 220 comprises an opaque area 225, a clear area 230, and modified serifs 235. Note that the shape of the modified serifs 235 is different than the shape of the design serifs 215. This is because the size of the serifs is very small—they are designed to be smaller than the optical resolution of the lithography process to be used—and the electron beam typically can not perfectly reproduce the design serif 215 shape onto the mask material. The result would be similar for masks which utilize other optical proximity correction features such as hammerheads, bias bars and assist bars.
One typical method of inspecting a mask for defects such as those illustrated in FIGS. 1 and 2 is illustrated in the flowchart of FIG. 3. After designing an integrated circuit 300 and creating a data file of mask design data 310, the mask design data is provided to a device such as an electron beam or laser writing machine and a mask is manufactured 315. The mask is then inspected for defects as shown at process block 320. The inspection may, for instance, be carried out by scanning the surface of the mask with a high resolution microscope (e.g., optical, scanning electron, focus ion beam, atomic force, and near-field optical microscopes) and capturing images of the mask. These mask images may then be observed by engineers off-line or mask fabrication workers online to identify defects on the physical mask. The next step, shown as decision block 325, is determining whether or not the inspected mask is good enough for use in the lithography process. This step can be performed offline by a skilled inspection engineer, or by fabrication workers online possibly with the aid of inspection software. If there are no defects, or defects are discovered but determined to be within tolerances set by the manufacturer or end-user, then the mask is passed and used to expose a wafer as shown at process block 340. If defects are discovered that fall outside tolerances, then the mask fails the inspection 325, and a decision 330 must be made as to whether the mask may be cleaned and/or repaired to correct the defects 335, or whether the defects are so severe that a new mask must be manufactured 315. This process is continued until a manufactured mask passes the inspection 325.
Once a physical mask is produced which passes the inspection, it is important to further inspect the mask to ensure that the mask will produce the desired image on a photoresist after a wafer is exposed to light through the mask. This is typically performed by undertaking the costly step of actually exposing and processing a wafer using the mask that is being inspected as shown at process block 340. The processed wafer is then inspected at block 345, and a decision 350 is made to determine whether there are any defects and whether the defects fall within tolerances. If discovered defects are substantial, then, as before, it is determined 330 whether the defects can be repaired 335 or whether a new mask must be produced 315. This process is continued until a mask is manufactured that will produce desired wafer patterns and that will pass the wafer level inspection shown at block 350. This mask is then used in the lithography process to expose the corresponding layer in the overall manufacturing process.
However, not all mask defects are important with respect to the desired end result—the end result being an-accurate representation of the original design layout on the photoresist material or etched into silicon. This is because not all mask defects will “print.” Loosely speaking, the printability of a defect is how a defect would impact the outcome of a given photolithography and/or etching process. The importance of printability now becomes apparent, because the goal of defect inspection is to correctly identify a defect in order to avoid a failed wafer processing. Since printability of a defect is mainly associated with the stepper exposure, it depends on the particular stepper exposure conditions. Therefore to say a′ defect is “not printable” means that it has little effect on the expected outcome of a particular stepper exposure, even though it may become “printable” under a different set of stepper exposure conditions. Put in a different way, printability is highly dependent on the stepper conditions, because a defect may print under one set of conditions, but not another. These conditions include: defect size, wavelength, numerical aperture, coherence factor, illumination mode, exposure time, exposure focus/defocus, and the reflection/transmission characteristics of the defect among others.
Currently, inspection tools that are in use include tools which inspect masks both on-line (ie. within the production line) and off-line. Conventional on-line inspection tools typically scan the entire mask area looking for defect areas, and some may also compare the inspected result with the mask layout database when defects are detected. However, the defect analysis of the typical on-line inspection tools are based primarily (or solely) on the size of the defect picked up by the optics to define the severity of a particular defect. While this scheme has been somewhat successful in the past, today's masks are designed with smaller and smaller features, using advanced and unconventional methods such as OPC. Due to these changes, conventional methods of inspection are rapidly proving to be inadequate because they do not address several issues.
First, whether a defect prints or not greatly depends on both its location and size, not just size or transmission/reflection characteristics alone. For example, a large defective spot in an isolated area may have little or no effect on the current and subsequent process layers. On the other hand, a small spot near a comer or an edge, or critical area should not be dismissed without closer examination. This is true for both conventional binary masks and advanced masks. Second, advanced OPC mask features can trigger false defect detections. The typical conventional scheme can falsely report an OPC feature or an imperfect OPC feature (e.g., rounded serifs as illustrated in FIG. 2) as a defect, when it actually has little impact on the end result. Although some existing mask inspection tools have a sliding scale setting to “tolerate” OPC features, this is not a robust method since defects associated with these special features may be overlooked because of this arbitrary scale. Additionally, OPC features are typically designed for a specific set of stepper parameters, but conventional tools, sliding scales are blind to these optical parameters.
Third, phase information is not properly incorporated into consideration, if at all, in the typical conventional defect inspection scheme. Therefore, phase shifting masks are not properly inspected. Finally, even though a defect may not appear to print, it might affect the process latitude in a way that will decrease yield and not be detected by conventional on-line defect inspection systems.
On the other hand, off-line inspection stations, which either scan for defects directly or review previously stored undeterminable defect data from an on-line tool, also face the same issues. In addition, these issues may require expensive engineers' time to be resolved, and thus diminish throughput while raising cost. Although with an engineer's judgement, magnitude of the defect printability/classification problem is greatly reduced due to experience and know-how, still, there is not enough certainty and accuracy until the defect is viewed as it appears on an actual wafer after exposure through the mask. This is especially true in today's lithography steppers using non-standard illumination modes such as annular and quadruple. Thus, using currently existing inspection systems, it is nearly impossible to judge a defect's printability without actually printing the mask onto a wafer, which is expensive and time-consuming.
Accordingly, in any mask inspection system, the important decision to be made is whether a given defect will “print” on the underlying photoresist in a lithography process under specified conditions. If a mask defect does not print or have other effects on the lithography process (such as unacceptably narrowing the photolithography process window), then the mask with the defect can still be used to provide acceptable lithography results. Therefore, one can avoid the expense in time and money of repairing and/or replacing masks whose defects do not print. What is desired then, is a method and apparatus for inspecting masks used in the photolithography process that solve the aforementioned problems of currently existing mask inspection systems.